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[WIP] riscv: Add sysarch(2) support for utidc #2142
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CHERI_LIB_C18N is only ever defined under the purecap ABI, so there is no need to separately check for the purecap ABI.
_rtld_unw_getcontext_epilogue is removed because when c18n is not enabled, the trusted stack field of the unwind cursor is unused anyway, so there's no need to fill it. _rtld_unw_setcontext is no longer in assembly because it is now expected to be called before all registers are restored, so it does not need to restore any register. setjmp and longjmp are updated to use the slightly changed API signatures.
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Previously, libunwind hard-codes knowledge about the layout of the trusted frame and has read access to the trusted stack. This is fragile and insecure. Now, the task of extracting the relevant registers from the trusted stack is delegated to RTLD, and libunwind no longer has access to the trusted stack. In addition, unify the APIs exposed to setjmp/longjmp and libunwind.
Assembly stubs for _rtld_unw_{get,set}context are removed. Instead, turn calls to these functions into no-ops when they are not defined by RTLD.
In the following example, bar makes a tail-call to foo, which returns a value that is observable to the caller of bar, even though bar returns nothing. void *foo(); void bar() { foo(); } When bar is called, previous versions of the trampoline clears return value registers as if foo is being called directly, leaking a capability. Instead, clear the maximum number of return value registers as required for both foo and bar.
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Currently callingsysarch(RISCV_SET_UTIDC, ptr)
doesn't actually set the register. What's missing?Not sure why CI is failing. It works fine locally on QEMU.